In the field of integrated circuit devices, and in particular in the field of application processor integrated circuit devices, modern integrated circuit devices are required to provide increasingly high performance, whilst concurrently they are required to meet increasingly stringent power consumption and thermal energy dissipation requirements.
It is known to implement multi-core architectures within integrated circuit devices in order to meet high performance requirements, such as a high maximum operating frequency requirement measured in mega instructions per second (MIPS). However, in practice, a typical use of such devices involves a processing rate that is significantly less than the maximum operating frequency requirements for the device. Accordingly, for a significant amount of the operating time of such devices, less than half the processing capacity is required.
It is known within a multi-core architecture, comprising two or more processing cores, to power down one or more of the processing cores when the processing load is sufficiently low to justify the reduction in system performance. However, it is also desirable to take advantage of any unused processing capacity in order to reduce the power consumption and thermal energy generation of such integrated circuit devices.